Helping the Microchip Industry Go (Very Low) with the Flow | NIST

A new NIST analysis reveals a heated source of potentially expensive errors.

Process Engineer Richard Kasica of NIST’s Center for Nanoscale Science and Technology holds a wafer of the type typically produced in the plasma-enhanced chemical vapor deposition chamber at center. Credit: Curt Suplee/NIST

August 22, 2018 – A new study by scientists at the National Institute of Standards and Technology (NIST) has uncovered a source of error in an industry-standard calibration method that could lead microchip manufacturers to lose a million dollars or more in a single fabrication run. The problem is expected to become progressively more acute as chipmakers pack ever more features into ever smaller space.

The error occurs when measuring very small flows of exotic gas mixtures. Small gas flows occur during chemical vapor deposition (CVD), a process that occurs inside a vacuum chamber when ultra-rarefied gases flow across a silicon wafer to deposit a solid film. CVD is widely used to fabricate many kinds of high-performance microchips containing as many as several billion transistors. CVD builds up complex 3D structures by depositing successive layers of atoms or molecules; some layers are only a few atoms thick. A complementary process called plasma etching also uses small flows of exotic gases to produce tiny features on the surface of semiconducting materials by removing small amounts of silicon.

Source: Helping the Microchip Industry Go (Very Low) with the Flow | NIST